10G Ethernet TCP/IP Stack FPGA IP Core for Network Acceleration

Developed based on AMD/Xilinx 10G Ethernet MAC IP, MTU data transmission up to 9000 bytes, AXI4 stream interface, supporting Kintex 7 / Virtex 7 / UltraScale / Ultrade+ / Zynq UltraScale+ Series FPGA devices, high bandwidth and low latency, fast data transmission and real-time processing, accurate and efficient data transmission of TCP protocol stack.


Código de artículo VAR-827003210

Número de pieza del fabricante: 10G Ethernet TCP/IP

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Artículo ubicado en y enviado desde: Riedlingen, Alemania


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10G-Ethernet-TCP-IP-Stack-FPGA-IP-Core-Network-Acceleration-wiew.jpg

Product Description

Developed based on AMD/Xilinx 10G Ethernet MAC IP, MTU supports up to 9000 bytes of data transmission, standard AXI4 Stream interface, supports AMD/Xilinx Zynq UltraScale+ RFSoC, Zynq UltraScale+ MPSoC, Virtex UltraScale+, Kintex UltraScale+, Artix UltraScale+, Virtex UltraScale, Kintex UltraScale, Virtex 7, Kintex 7, Zynq 7030/7035/7045/7100 Series FPGA devices. The 10G Ethernet with high bandwidth and low latency ensures fast data transmission and real-time processing, while the TCP protocol stack further improves the efficiency and accuracy of data transmission.


We provide you with a fast, reliable, low-cost, and high-performance solution that significantly shortens the time to market and is suitable for high bandwidth, low latency, and high-speed data transmission scenarios.

Applications

  • ● Data Center

    ● Cloud Computing Storage

  • ● Telecommunications

    ● Industrial Automation

    ● Internet of Things

  • ● Medical

    ● 4K/8K HD Video Transmission

  • ● Scientific Research Experiment

    ● Test Measurement



Key Features

● Implement an ARP/IPV4/ICMP/TCP protocol stack that complies with the IEEE802.3 standard based on the OSI layered model.

● Supports ARP for obtaining or sending MAC addresses.

● Supports ICMP for responding to Ping commands.

● Acts as a TCP server, responding to client connection and disconnection requests, with the ability to actively initiate a disconnection request.

● ARP responds to all incoming requests but maintains only a single ARP table dedicated to active connections.

● Connection requests are not responding if the ARP table is not established.

● Connection requests are only accepted after receiving the configured TCP listen request when the ARP table is established.

10Gbps Ethernet connection, supporting TCP/IP checksum processing, calculating CRC by the MAC IP.

● Developed based on AMD/Xilinx 10G MAC IP, supporting MTU up to 9000 Bytes and a minimum 64 Bytes data transmission size.

● Handles sending, receiving, and responding of TCP data packets, and keeps maintenance on heartbeat messages.

● Ensures in-order delivery, retransmission, acknowledgment, and fast retransmission in TCP transmission.

● Flow control is based on receiving and sending windows in TCP transmission.

● After establishing a TCP connection, immediately disconnect upon receiving an RST packet from the client.

● Up to two TCP connections in maximum.

AXI4 Stream interface for users, with the protocol stack using a clock of 156.25 MHz generated by the MAC IP, and a 10 Gbps data bus width of 64 bits.

● The internal data of the TCP/IP protocol stack IP core is processed with 8-byte alignment.

10G-Ethernet-TCP-IP-Stack-FPGA-IP-Core-for-Network-Acceleration1.jpg


Identificación de artículo 102755
Estado
ID de artículo histórico
Modelo 10G Ethernet TCP/IP
Fabricante
País de origen
Contenido 1 undefined
Peso 1000 g